Data Transfer Methods (DTM)

There are three input/output programming techniques based on the relationship mechanism between the processor and the input/output device controller, namely:

  1. Programmed I/O
  2. Interrupt I/O Devices
  3. DMA (Direct Memory Access).

Dma Controller Diagram
Dma Controller Diagram

1. Programmed I/O 

It is a computer I/O device that is controlled by a program. Examples are machine language instructions in, out, move. When an I/O device handles a request, the registers set the status of the device.

The device cannot notify the processor when a task has been completed. The processor must always check the registers for the device status.

The device controller software (driver) must transfer data to or from the controller. The driver communicates with the Driver Adapter to execute commands until the operation is complete.

Here are 3 categories of instructions that must be present in the Driver:

Control

  • Instructions to control hardware operations (main board)
  • Instructions for activating external devices
  • Instructions to tell what actions the hardware and external devices (Reasoning) need to take.

Example: The DVD Drive unit is instructed to return to the starting position, go to the next record, or some other action.

Testing

Instructions for checking hardware status and related I/O devices.

Reading / Writing

  • Instructions for reading/writing from/to hardware
  • Instructions for transferring data between registers or external devices.

Weakness: This method is very inefficient because a lot of time is wasted just waiting for hardware status or the completion of I/O device operations.

2. Interrupt Controlled Devices (Interrupt I/O)

Interrupts are a complex mechanism for coordinating I/O transfers. The concept of interrupts is widely used in Operating Systems and Control Applications, where certain subroutines must be carefully managed, relative to external (unexpected) events.

The following is the Interrupt I/O mechanism:

  • The processor gives instructions to the I/O device, then continues with other tasks.
  • The I/O device will give instructions to request the next service, after the Ready status to perform data exchange.
  • When receiving a hardware interrupt, the processor immediately prioritizes execution for the hardware (data transfer).

Process Overview

Interruptions can occur when hardware or software requests to be "serviced" by the processor. When an interruption occurs, the processor stops the process it is working on, then switches to working on the interrupt service routine. Once completed, the processor resumes the pending process.

To start an I/O operation, the CPU loads the appropriate registers for the device controller. In turn, the device controller examines the contents of the registers to determine what operation to perform. When an I/O operation is executed, there are two possibilities, namely synchronous I/O and asynchronous I/O.

In synchronous I/O, control is returned to the user process after the I/O process is completed.

While in asynchronous I/O, control is returned to the user process without waiting for the I/O process to complete. So the I/O process and the user process can run simultaneously.

Advantages: The processor is not busy waiting/maintaining all operations or the status of I/O devices. This technique is better compared to programmed I/O techniques.

3. DMA (Direct Memory Access)

It is a method of handling I/O where the device controller directly communicates with memory without CPU intervention. After setting buffers, pointers, and counters for the I/O device, the device controller transfers blocks of data directly to storage without CPU intervention.

DMA is used for high-speed I/O devices. There is only one interrupt per block, unlike low-speed devices where an interrupt occurs for each byte (word).

DMA Transfer

To initiate a DMA transfer, the host writes a DMA command block containing pointers to the source of the transfer, the destination of the transfer, and the number of bytes to be transferred, into memory.

The CPU then writes the address of this command block to the DMA controller, so that it can immediately operate the memory bus directly by placing addresses on the bus to perform transfers without CPU assistance.

There are 3 steps in a DMA transfer:

  • The processor prepares the DMA transfer by providing the data from the device, the operation to be performed, the memory addresses that are the source and destination of the data, and the number of bytes to be transferred.
  • The DMA controller initiates operations (setting up the bus, providing addresses, writing and reading data), until the entire block has been transferred.
  • The DMA controller interrupts the processor, and then determines what the next action will be.

Basically, DMA has two different methods of transferring data;

  1. The first method is HALT, also called Burst Mode DMA, because the DMA controller takes control of the system bus and transfers all blocks of data to or from memory in a single burst. While the transfer is in progress, the microprocessor system is set to idle, not executing any operating instructions to maintain the internal registers. This type of DMA operation is present in most computers.
  2. The second method involves the DMA controller to hold control of the bus system for a shorter period of time when the microprocessor is busy with internal operations and does not need access to the bus system. This DMA method is called Cycle Stealing Mode. Cycle Stealing DMA is more complex to implement than HALT DMA, because the DMA controller must have the intelligence to predict when the bus system will be open.

Handshake

The handshaking process between the DMA controller and the device controller is done through a pair of cables called DMA-request and DMA-acknowledge. The device controller sends a signal through the DMA-request, when it will transfer one word of data. Then this will cause the DMA controller to enter the desired addresses into the memory address cable, and send a signal through the DMA-acknowledge cable. Once received, the device controller sends the intended data and turns off the signal on the DMA-request. This happens repeatedly so it is called handshaking.

Reference

http://www.informatics.buzdo.com/p320-dma-controller.htm


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