What is MOSFET? (WMOSFET)

1. The basis of MOS FET formation

MOSFET stands for (Metal - Oxide Semi Conductor FET)

• MOSFET has legs:
• Source = S
• Drain = D
• Gate = G

The composition of the MOSFET formation can be described as follows:

• N type semiconductors are given drain (D) and source (S) terminals.
• A P-type semiconductor called the Substrate is added to the inside.
• Then, on another part, a thin metal oxide layer (Si 02) is attached and called the Gate. Si 02 acts as an insulator.

Basic Materials of MOS FET

Figure 17(e) shows that the Substrate and Source are combined and obtained as Source (S). This is usually done by the manufacturer.

So on the market we often find Mosfet with 3 legs, but it is also common for Mosfet to have 4 legs. For a 4-leg Mosfet, you can be sure it has 2 gates (G1 and G2), the other legs are Drain (D) and Source (S).

2. Depletion and Enhancement Type MOSFET Structure

a. Type Depletion MOSFET Channel N - b. Type Enhancement MOSFET Chanal N

a. Depletion MOSFET P - b. Enhancement MOSFEET Type N - c. Enhancement MOSFET Type p

3. MOSFET symbols

MOSFET symbols

INFORMATION:

• a) Depletion Mosfet Channel n
• b) Depletion Mosfet Channel p
• c) Chanal N Mosfet Enhancement
• d) Chanal P Mosfet Enhancement

4. Types of MOSFET

To learn the basic properties of MOSFETs, we must know the various types of MOSFETs, which are divided into 2 types, namely:

• Type Depletion Mosfet (D Mosfet).
• Type Enhancement Mosfet (E Mosfet).

The two types of MOSFET are distinguished based on the method of providing the Substrate layer. In Depletion MOSFET, the Substrate layer is installed in the channel without touching the metal oxide (Si 02) so that there is a narrow channel remaining.

In the second type of Enhancement Mosfet, the Substrate layer is installed on the channel directly through the metal oxide layer (Si 02) so that the channel is closed while the Drain and Source are separated by the Substrate. The materials used as channels and Substrates are both Semiconductors but opposite types.

5. MOSFET Bias

To operate the on and off of a MOSFET, a Bias Voltage is required on the Gate and Source (UGS) and a supply voltage between the Drain and Source (UDD).

UGS bias is divided into 2 types:

• Mosfet enhancement bias → UGS + (Positive)
• Mosfet depletion bias → UGS - (negative)

Pay attention to the following image, explaining how to bias the D Mosfet Type N

Bias D Mosfet with Depletion Mode

Bias D Mosfet with Enhancement Mode

How D MOSFET works

D Mosfet can be operated by giving bias to its gate, namely:

• Depletion Bias (Negative UGS)
• Bias Enhancement Mode (Positive UGS)

1. D Mosfet with Depletion Mode

The Drain and Source Supply Voltage (UDS) will cause current to flow from Drain to Source (ID) through the narrow channel.

The UGG voltage that supplies the Gate and Source (UGS) will control the width of the channel. If the channel is wide, the number of electrons passing through the channel from Source to Drain increases and the electric current ID is large. Conversely, if the channel is narrower, the number of electrons passing through will be small and the electric current ID will be smaller.

So the size of the Drain current (ID) will be controlled by the Gate and Source voltage (UGS). If the UGS voltage is increasingly negative (reaching UGS off) then the ID current is getting smaller ⤳ 0.

When the UGS voltage ⤳ 0 (Gate Source short circuit) the Drain current ID is getting bigger. The UGS voltage that causes ID ⤳ 0 is called the UGS cut off voltage or (UGS off) For negative D Mosfet.

2. D Mosfet with Enhancement Mode

As explained above, only the Gate is given a positive voltage (+ UGS). If the Gate is more positive to the Source, the Mosfet channel conductivity will be greater. This causes the Drain current to the Source (ID) to reach its maximum. Because the D Mosfet has a current when UGS ⤳ 0, it is also called a "Normal ON" Mosfet. IDSS when UGS ⤳ 0 is not the maximum Drain current.

3. Isolation Prisoner

We know that the input resistance (Zi) of the Mosfet is the resistance between the Gate and Source. So Zi is very high in Gega ohm (G Ω), because between the gate (G) and Source (S) is separated by Si 02 metal oxide, which is an insulator.

4. Characteristics of D MOSFET

ID-UGS Transconductance Curve (D Mosfet Channel N) & Output Characteristics Curve (D Mosfet Channel)

E MOSFET

Enhancement type MOSFET (E Mosfet) or enhancement Mosfet only works in Enhancement Mode or UGS + (Positive) bias.

E Mosfet with Enhancement Mode

1. How E MOSFET Works

If UGS ⤳ 0 the UDD voltage will force electrons from Source to Drain or electric current from Drain to Source. But because the Substrate layer closes the channel and is positively charged, it will hold / block the current and cause no current to flow so that the Drain current ID ⤳ 0.

When the Gate is given a positive voltage (UGS +) then at the connection between the Substrate and the metal oxide (Si 02) an electron charge (negative) arises and forms an N channel (Like a Capacitor). The widening of the channel will cause a lot of electric current to flow from Source to Drain and there is an electric current flowing from Drain to Source (ID). The more positive the UGS voltage, the greater the Drain current (ID).

The minimum UGS voltage that can cause a narrow channel and start the ID current flowing or E Mosfet ON is called the threshold voltage (thereshold voltage) UT.

2. MOSFET noise

MOSFET in addition to having high input resistance also has very low Noise / Hiss when compared to Transistors. Because the structure of the material for the channel (channel) is made of one type of N or P semiconductor material only without a connection as a path for the Drain (ID) current to the Source.

Output Transconductance (Transfer) Curve [ID - UGS E Mosfet Channel N] & Characteristic Curve [E Mosfet Channel N]

Mosfet D-Channel N-Shaped Material Structure and Symbol

Output Characteristics of D Mosfet N-Cahanal & Transfer Characteristic Curve (Transconductance) of D Mosfet N-Cahanal

MOSFET Properties

To make it easier to understand the electrical properties of MOSFETs whether they are operated in static or dynamic conditions, we need to review the understanding of the working principles of MOSFETs by studying the various characteristics of MOSFETs, and the basic description of MOSFET amplifiers from the parameters owned by MOSFETs.

1. D Mosfet Channel N

a. Transconductance Curve - b. Symbol - c. Output Curve Characteristics

2. D Mosfet Channel P

a. Transconductance Curve - b. Symbol - c. Output Characteristic Curve

3. E Mosfet Channel N

a. Transconductance Curve - b. Symbol - c. Output Characteristic Curve

4. E Mosfet Channel P

a. Transconductance Curve - b. Symbol - c. Output Characteristic Curve

Information:

• Up = Pinch off voltage, namely the UGS voltage that causes the drain current ID = 0 or Mosfet off ⇒ (Up = UGS off)
• UT = Threshold voltage (threshold voltage) on E Mosfet, namely the UGS voltage that causes the drain current = 0 or E Mosfet off
• K = A constant number whose value depends on the specific type of MOSFET.
• On E Mosfet. IDSS is not valid for finding ID because when UGS = O ID = O
• The K value of the formula above can be taken as an approach of 0.3 mA / V
• IDSS = Drain Current when UGS = O

Basic Mosfet amplifier

New terms in Mosfet amplifier parameters that apply to AC signals:

1. gm (Transconductance)

2. rd (Drain Resistance)

3. µ (Reinforcement Factor)

The current voltage notation followed by a lower case letter index in the formulas above means:

• id : Drain current for small AC signals
• Ugs : small AC signal voltage on G and S
• Uds: small AC signal voltage generated at D and S.

Measuring MOSFET Characteristics With CRO

1. Specific Learning Objectives

After completing this practice, it is expected that users will be able to display and describe the MOSFET characteristic curve.

2. Tools and Materials:

Tool:

• AVO digital meter and probe cable. 1 piece
• Analog AVO meter and probe cable. 2 pieces
• Two channel CRO and 1 probe
• Linear power supply 0 -- 30 Volt 2 pieces
• Power Transformer 0-15Volt AC Job Sheet

Material:

• MOS-FET module 1 piece
• 100 Ω resistor 3 pieces
• 1 kΩ potentiometer 1 piece
• Diode 1N4007 1 piece

4. Occupational Safety

1. Read the technical instructions for using the tool.
2. Be careful, the transformer prime mover part is a 220Vac mains voltage.
3. The condenser must not be installed in reverse polarity
4. Every time you are going to do a circuit experiment, the voltage source must always be turned off first.
5. Pay attention to safety and cleanliness of the work space/workshop.

5. Information

MOSFETs are divided into 2 types, namely:

• Type Depletion Mosfet (D Mosfet).
• Type Enhancement Mosfet (E Mosfet).

6. MOSFET Bias

To operate the on and off of a MOSFET, a Bias Voltage is required on the Gate and Source (UGS) and a supply voltage between the Drain and Source (UDD).

UGS bias is divided into 2 types, namely:

• Mosfet enhancement bias → UGS + (Positive)
• Mosfet depletion bias → UGS - (negative).

7. Characteristics of D MOSFET

• a. Transconductance Curve (Transfer)
• b. Output Characteristic Curve ID - UGS E Mosfet Chanal N
• c. E Mosfet Channel N

Cahanal N Mosfet D Output Characteristics

Transfer Characteristic Curve (Transconductance) D MOSFET Cahanal N

8. Practical Step 1

MOSFET 1 Working Circuit

8.1 Measurement of input characteristics:

1. Ground at the base of the transistor
2. Voltmeter on UGS
3. Milli Ammeter on ID
4. U1 input is a dual voltage +5V, 0V and -5V.

8.2 Set the UGS input voltage according to table I (monitored by Voltmeter).

8.3 Record each Drain ID current designation and record the current designation in Table I.

| No | UGS (Volt) | ID (mA) |
|----|------------|---------|
| 1  | 0          |         |
| 2  | 1          |         |
| 3  | 2          |         |
| 4  | 2,5        |         |
| 5  | 2,6        |         |
| 6  | 2,7        |         |
| 7  | 2,8        |         |
| 8  | 2,9        |         |
| 9  | 2,92       |         |
| 10 | 2,95       |         |
| 11 | 3          |         |

8.4 Describe the form of input characteristics based on table I above.

MOSFET input characteristics - ID = f (UGS)

9. Practical Step 2

Create a network like below:

MOSFET 2 Working Circuit

9.1 Measurement of output characteristics ID = f (UDS):

1. Ground on Drain
2. CH1 at point B (Volt/div = 5V/cm)
3. CH2 at point A (Volt/div = 5V/cm)
4. CRO position at (xy)
5. U1 voltage input is dual DC voltage +5V, 0V, -5V

9.2 Set the x and y inputs (CH1 and CH2) to ground position, and align the CRO screen dot to T position (see CRO column).

9.3 Set the x and y input positions (CH1 and CH2) to DC position.

9.4 Describe each of the characteristic shapes displayed by the CRO screen in the CRO column below for various Gate-Source (UGS) voltages at:

| 1 | UGS   = 0 Volt | 5 | UGS   = 3,1 Volt  |
|---|----------------|---|-------------------|
| 2 | UGS   = 1 Volt | 6 | UGS   = 3,3 Volt  |
| 3 | UGS   = 2 Volt | 7 | UGS   = 3,4 Volt  |
| 4 | UGS   = 3 Volt | 8 | UGS   = 3,45 Volt |

(First set the Gate-Source (UGS) voltage by adjusting the DC input voltage through the potentiometer VR1 setting so that the Voltmeter indication is at 0 Volts. Draw the curve shape displayed by the CRO screen. Increase the DC input voltage so that the Voltmeter indication becomes 1 Volt. Draw the curve shape displayed by the CRO, as well as for the Gate-Source (UGS) voltages of 2V, 3V, 3.1V, 3.3V, 3.4V and 3.45V. The div/cm designation on the CRO x-axis (UCE) is 1 column = 5 Volts; while the CRO y-axis (IC) is 1 column = 0.05 mA derived from the calculation → (Volt/div) : R2 → (5V): 100Ω → 1 column = 0.05 mA.

MOSFET output characteristics - ID = f (UDS)

9.5 Questions:

1. At what gate-source (UGS) voltage does the MOS-FET start to conduct?
2. What is your conclusion from the characteristics of the transistor output?

10. Practical Step 3

Assemble the network as below:

MOSFET 1 Working Circuit

10.1 Measurement of input characteristics:

1. Ground at the base of the transistor
2. Voltmeter on UGS
3. Milli Ammeter on ID
4. U1 input is dual voltage +5V, 0V and -5V

10.2 Set the UGS input voltage according to table I (monitored by Voltmeter)

10.3 Record each Drain ID current designation and record the current designation in Table I.

| No | UGS (Volt) | ID (mA) |
|----|------------|---------|
| 1  | 0          | 0       |
| 2  | 1          | 0       |
| 3  | 2          | 0,1     |
| 4  | 2,5        | 0,2     |
| 5  | 2,6        | 0,5     |
| 6  | 2,7        | 1       |
| 7  | 2,8        | 3       |
| 8  | 2,9        | 6       |
| 9  | 2,92       | 7       |
| 10 | 2,95       | 10      |
| 11 | 3          | 18      |

10.4 Describe the form of input characteristics based on table I above.

MOSFET input characteristics - ID = f (UGS)

11. Practical Step 4

Assemble the network as below:

MOSFET Working Circuit Picture 3

11.1 Measurement of output characteristics ID = f (UDS):

1. Ground on Drain
2. CH1 at point B (Volt/div = 5V/cm)
3. CH2 at point A (Volt/div = 5V/cm)
4. CRO position at (xy)
5. U1 voltage input is dual DC voltage +5V, 0V, -5V

11.2 Set the x and y inputs (CH1 and CH2) to ground, and align the CRO screen dot to the T position (see the CRO column).

11.3 Set the x and y input positions (CH1 and CH2) to the DC position.

11.4 Describe each of the characteristic shapes displayed by the CRO display in the CRO column below for various Gate-Source (UGS) voltages at:

| No | UGS (Volt) | ID (mA) |
|----|------------|---------|
| 1  | 0          | 0       |
| 2  | 1          | 0       |
| 3  | 2          | 0,1     |
| 4  | 2,5        | 0,2     |
| 5  | 2,6        | 0,5     |
| 6  | 2,7        | 1       |
| 7  | 2,8        | 3       |
| 8  | 2,9        | 6       |
| 9  | 2,92       | 7       |
| 10 | 2,95       | 10      |
| 11 | 3          | 18      |

(First set the Gate-Source (UGS) voltage by adjusting the DC input voltage through the potentiometer VR1 setting so that the Voltmeter indication is at 0 Volts. Draw the curve shape displayed by the CRO screen. Increase the DC input voltage so that the Voltmeter indication becomes 1 Volt. Draw the curve shape displayed by the CRO, as well as for the Gate-Source (UGS) voltages of 2V, 3V, 3.1V, 3.3V, 3.4V and 3.45V. The div/cm designation on the CRO x-axis (UCE) is 1 column = 5 Volts; while the CRO y-axis (IC) is 1 column = 0.05 mA derived from the calculation → (Volt/div): R2 → (5V): 100 Ω → 1 column = 0.05 mA.

MOSFET output characteristics - ID = f (UDS)

12. Answer Questions

12.1 At what gate-source (UGS) voltage does the MOS-FET start to conduct?

Answer: At voltage... UGS = 2 Volts

12.2 What is your conclusion from the characteristics of the transistor output?

Answer: The increase in UGS price will be followed by an increase in Drain ID current, along with a decrease in UDS Drain Source voltage.

Reference:

• FET and MOSFET Data and Equations; First Revised Edition; Publisher PT Elex Media Komputindo Gramedia; Jakarta
• Esan Hasan BSC; Basic Electronic Circuits; Ganeca Exact; Bandung; 1990;
• Malvino Hanapi Gunawan; Principles of Electronics; Erlangga; Jakarta; 1984;
• Wasito S; Electronics Publishing House; Gramedia; Jakarta; 1986
• Distrelec , Total electronics
• Wasito Electronics Lessons, Main Work, Jakarta 1980
• Electrical & Electronics Teaching Materials, PPPGT Malang

MOSFET Amplifier Model

The amplifier model for MOSFET can be made in various forms as with bipolar transistors, likewise the biasing system can usually be done in 3 ways:

1. Fixed Bias
2. Self Bias
3. Devider Bias (Voltage Divider Bias)

Basic Model of MOSFET Amplifier

Types of MOSFET Amplifiers

1. Common Source (CS) Amplifier

a) Common Source Amplifier Circuit & b) AC Replacement Circuit

AC analysis requirements:

• All capacitors are considered short circuited
• The power supply is considered short circuited

Voltage Gain

2. Common Drain Amplifier

a) Common Drain Amplifier Circuit & b) AC Replacement Circuit

Voltage Gain

3. Common Gate Amplifier

a) Common Gate Amplifier Circuit & b) AC Replacement Circuit

Voltage Gain

Work Point

The working point of the amplifier with mosfet can be set or adjusted like a transistor. Namely by adjusting the UGS voltage bias. It should be noted that mosfet also has the same electrical properties experienced by bipolar transistors, namely saturation and cut off properties (Automatically).

• Mosfet saturated: when ID is maximum and UDS ⤳ is zero
• Mosfet Cut off: when UDS is maximum and ID ⤳ is zero.

Both of these properties in MOSFET are controlled by the UGS voltage. The position of the saturation point and cut off will determine the slope of the DC load line.

The amplifier's working point (Q point) will swing along the DC load line. If the position of the amplifier's working point (Q point) is in the middle of the DC load line, it is called a class A amplifier.

If the working point (point Q) is close to the cut off point, it is called class B. If the working point Q is at the cut off point, it is called class C.

For class B and class C amplifiers, the system's on-off control is controlled by an AC signal with a relatively large voltage at the Gate input.

So when Gate has no AC signal, then the mosfet is off. And when Gate gets an AC signal with a large voltage level, then the mosfet is ON. both class B and C amplifier systems are usually for power amplifiers. Class A amplifiers are good for small signal amplifiers that have high fidelity.

It should be noted that the reliability of Mosfet compared to Bipolar Transistors is, the transfer of input signals to the output through the field effect process, and not a direct connection like a transistor. The Gate current is very small (⤳ 0). because there is a metal oxide SO2 as an insulator between Gate and Source / Drain. So because the input current is very small, the noise is low.

The weakness of Mosfet is the high difficulty factor. Because the field effect is very wide not limited by the Gate voltage within the critical limit, so that one mosfet with another of the same type, may not produce the same results.

a) D Mosfet With Fixed Bias & b) Q Working Point of Amplifier

The image above shows a D Mosfet amplifier with Fixed Bias (fixed bias). And the working point of the amplifier.

1. How to determine Working Point:

• The UDD voltage gives the UDS voltage and the ID current.
• The UG voltage provides voltage to the UGS.

Based on Kirchoff's law

Between ID mak and UDS mak ⤳ UDD , draw a straight line. this line as the DC load line.

The input resistance of the Mosfet (Ri) is very high, so the Gate current Ig = 0. The voltage drop at RG URG = 0. So UGS = UG - URG = UG = 2V.

The point on the load line is located at UGS = 2 V = UGS Q

UGSQ and IDQ = a straight line can be drawn from the UDS and ID sources to point Q.

It can also be calculated using the equation:

UDSQ  =  UDD  -  IDQ . RD
IDQ      =  IDSS ( 1 - UGS/Up ) 2

IDSS and Up for each MOSFET can be seen in the data table.

Implementation / Use of MOSFET

MOSFET in its use can function like a bipolar transistor. It can act as an active component. Like a bipolar transistor, only in its operation the control of the output current is driven by the Gate and Source (UGS) voltage, can be positive or negative.

1. Crystal Oscillator

Fig.38 Crystal Oscillator

Fig. 39. Example of an oscillator circuit

Figure 38 above is a modification of the PIERCE oscillator controlled by a crystal.

Figure 38C shows the Feed Back circuit between Gate Source and Drain Source giving a capacity that parallels the crystal, which will give a high quality factor at parallel resonance. To find the exact frequency, we must first know the capacity Cp and L in Figure 38 b.

The output phase on the Drain is opposite to the input on the Gate. This type of oscillator will produce frequencies that are useful for VHF and UHF, at frequencies below 2 MHz. The CGS and CDS capacitances of the Feedback circuit are not enough to provide oscillation. Therefore, an external capacitor must be added to add capacity to the Mosfet transistor.

2. Dynamic MOS Circuit

Circuits that use Mosfet are abbreviated as MOS. Examples of shift register and memory circuits that have quite large capacities. This circuit works controlled by clock pulses and is called a dynamic MOS circuit. Dynamic MOS circuits provide temporary storage by using parasitic capacity between the gate and the substrate.

This storage is made permanent by the operation regulated by the clock pulse. The leakage of the gate circuit is very small, the time constant is milliseconds. So to maintain the stored data, a clock pulse of approximately 1 Khz is required.

Fig. 40. Dynamic MOS Inverter

3. Dynamic MOS inverter

The circuit of figure 40 shows a MOS inverter that requires a sequence of clock pulses for proper operation. When the clock is at 0 V, transistors Q2 and Q3 are not conducting, so the available power supply is disconnected from the circuit and does not actually provide the required power.

When the clock pulse becomes -10 V, transistors Q2 and Q3 become active and the input voltage Ui is reversed. So, if Ui = -10 V, then Q1 will operate and its output will be Uo ⤳ 0. While if Ui = 0 V, then Q1 will stop working and its output will be Uo ⤳ -UDD (say -10 V). As long as the clock is at 0 V, the output capacitor C retains its charge and thus maintains the output terminal at a voltage of -UDD, the capacitor has a typical capacitance of 0.5 pF, and this is the parasitic capacity of Q3 between source and ground.

The inverter discussed above has been known as a ratio inverter. This term comes from the fact that when the input goes low, the clock pulse also goes low, and transistors Q1 and Q2 form a voltage divider between - UDD and ground. Therefore, the output voltage Uo depends on the ratio of the resistance of Q1 in the operating state, to the effective load resistance of Q2 (a typical value of this ratio < 1 : 5). This ratio is related to the physical size of Q1 and Q2 and is often referred to as the aspect ratio.

4. Low Frequency Power Amplifier

Figure 41 below shows the use of E. Mosfet as a medium power final amplifier of 70 watts at 8Ω load and 180 watts at 4Ω load. E Mosfet IRF 9540 and IRF 540 are complementary pairs.

The circuit is equipped with time delay.

Fig. 41. Audio Amplifier Circuit using Mosfet

Technical Data:

• Input voltage 1 Volt
• Input Resistance 48 KΩ
• Output Power (1 Khz 0.1% THD 8 Ω) 63 Watt
• Frequency Response (0 to -3 dB) 5 Hz - 125 Khz
• Harmonic Flaw 20 Hz - 20 Khz, 60w, 8Ω 0.05 %
• Harmonic Flaw 1KHz 1W , 8Ω 0.006 %
• Harmonic Flaw 1KHz - 60W , 8Ω 0.005 %
• Voltage gain factor 24.6 = 27.8 dB
• Symmetrical supply voltage ± 35 V
• Quiescent current T 12. 13 200 mA

Component Data:

Construction / Materials Forming MOSFET

FET is a semiconductor component that works based on the regulation of Current with Electric Field. FET is called Unipolar Transistor because it works only based on the flow of majority charge carriers. While Transistor is called Bipolar Junction Transistor because it works based on the flow of Majority and Minority charge carriers.

Transistor Family (Semi Conductor):

Transistor Family (Semi Conductor)

Fig.1. FET structure

Figure (1-a) shows the structure of an N-channel FET. This FET consists of an N-type semiconductor rod sandwiched on both sides by P-type semiconductor material.

FET has 3 electrodes, namely; Source (S), Gate (G), and Drain (D). Between (G) and (S) a UGG voltage is installed which is a reverse bias for the gate (G) Because the diode between (G) and (S) experiences reverse bias, a Depletion Layer arises at the junction (see figure 1-b) In order for flow to occur between (S) and (D), a voltage source (UDD) is installed between these two electrodes. The size of the current that flows depends on the width of the Depletion Layer.

If UGG is large, the Depletion Layer will be so wide that it almost closes the channel between (D) and (S). Since there are no charge carriers in the Depletion Layer, it means that the number of charge carriers in the channel becomes small. If UGG is small, the Depletion Layer is thin enough and the channel between (S) and (D) is wide enough, thus the current flowing is large enough.

So the gate voltage determines the amount of current flowing between (D - S). Since G is in reverse bias, the current (G) is considered to be zero.

Fig. 2 FET symbol

Figure 2 shows the symbol of a J FET when the tip of the arrow from the gate is pointing towards the vertical line which represents the channel, a J FET with an N channel (Figure 2-a). Conversely, if the tip of the arrow is pointing away from the channel, the J FET is a J FET with a P channel (Figure 2-b).

It is called a special construction Mosfet because this type of Mosfet has a special composition, unlike the usual Mosfet. The following are included in the special construction Mosfet:

1. Dual Gate Mosfet
2. V Mosfet
3. SIP Mosfet.

1. Dual Gate Mosfet

The double gate mosfet has a special form, namely having two current flow paths. Each current channel can pass through a gate and is independent of each other.

The image below shows a layout and symbol of a double gate MOSFET (2 gates) of the N channel type. The four connections on a special shape MOSFET are also called Tetrode MOSFET.

a. Material composition & b. 2 Gate MOSFET symbol

Current channel G1 through channel 1, G2 through channel 2, with drain current ( ID ) independent of two kinds of gate voltage UGS1 and UGS2. Figure 43 shows the characteristics of two-gate MOSFET Drain Current ( ID ) function of UGS1 and UGS2.

Characteristic Graph of UGS1 and UGS2 Function ID

An important continuation of the characteristics is shown in the forward condition SG1, Y12 for gate 1 controlling voltage function at gate 2 (UGS2).

Forward Characteristics

It is shown above that the two gate mosfet is arranged as an amplifier and the gain factor is limited. At the gate G1 an example of a final amplifier is obtained, the signal is given to G2 where the G2 voltage setting is obtained. Through the characteristics of the Mosfet, the gain control can be done.

Two gate MOSFET can also be used as a Mixer in FM receivers and televisions, where the signal voltage is given at both gates with various frequencies. Thus through the dual control "MIXING" can be mixed two frequencies with specified limits. In it there is an additional series of two Zener diodes that are connected anti-parallel on each gate. In this case static interference can be corrected.

Because through the zener diode on the electrodes of the Source and Substrate can be affected. The image below shows the replacement circuit of the dual gate MOSFET type BF 961.

Two Gate Type BF 961 Mosfet Replacement Series

2. V Mosfet

With field effect transistor (FET) we can only gain small power. The relative channel length is approximately ± 5 µm with a resistance of 1KΩ - 10 KΩ.

With the development of techniques it is possible to place a Horizontal layer on the FET also on the vertical structure. Thus, a high current and voltage transformation is provided which is adjusted to the amount of power gain. Figure 46 below shows a V N-channel MOSFET and its symbol.

a. Composition of V Channel Enhancement Mosfet Materials N & b. E Mosfet Symbol

It is called V Mosfet because the material structure forms the letter V through the V shape (1.5 µm) which can be transformed into a resistance of 1-5 Ω on a V Mosfet semiconductor plate. More V Mosfet shaped elements are installed in parallel, so that high current measurements are obtained, and higher power amplification on the V Mosfet.

V Mosfet can transform currents up to 10 Amperes and Drain Source voltages (UDS) up to 100 Volts.

However, there is a time switch in the nanosecond (ns) region. The figure shows the characteristics of a MOSFET and output. These characteristics are similar to N-Channel MOSFET.

At V Mosfet the Drain Current (ID) is getting bigger

a. Mosfet V Transconductance Curve & b. Mosfet V Output Characteristics

V Mosfet can be used as an amplifier or as a switch in areas with small power. The input resistance RGS is in the insulating layer of 10¹²Ω. Thus it is very possible for V Mosfet to produce large voltage amplification.

3. SIP Mosfet

The name SIP Mosfet stands for Siemen Power Mosfet. Here it is also known as high power Mosfet. The image below shows a symbol and the arrangement of layers of a SIP Mosfet.

Symbols and Structure of SIP Mosfet Material

The arrangement of the SIP Mosfet layers is made in horizontal layers. At low ohms, the N+ crystal produces an N layer. On the top surface of the N+ layer, the Source is arranged in the P layer.

An insulating Quartz (Crystal) is built as a gate electrode between the top surface of the Source.

This way there is a SIP Mosfet layer of many MOS elements connected in parallel so that high power losses can be eliminated.

In the SIP Mosfet there is a FET layer, to control the output characteristics. Example for BUZ 23.

Transconductance Characteristics and Output Characteristics of BUZ 23

SIP Mosfet has a high input, but the transformation resistance in large controls only varies from milli ohms to ohms. (connection time) in large settings in a few nanoseconds (ns) and there are no two transfers like bipolar transistors, because the channel resistance transformation has a positive temperature value.

SIP MOSFET is used as a fast power switch and has the advantage of power control unlike transistors. Here is shown the temperature dependence of power loss for SIP MOSFET.

If the MOSFET temperature increases, the ohm power decreases so that the MOSFET does not turn off and when the temperature is normal the power can increase again.

Power curve Function of temperature SIP Mosfet BUZ 23

Source:

• Compiled by Drs. Herry Sudjendro
• Editor Drs. Asmuniv

Discussion of MOSFET Questions

Question

1. Draw the symbols of the N-channel MOSFET.

• a) Depletion Mode.............................................. ....
• b) Mosfet Enhancement..............................

2. Describe the characteristics of D MOSFET Channel P.

3. Describe the E Characteristics of Mosfet Channel P.

4. Explain why MOSFET (Field Effect Transistor) has lower noise than ordinary unipolar transistors.

5. D N-type MOSFET (NMD) with Type BF 900, the packaging is shown in the Package and Pinout SOT 103 J columns

• a) Maximum and minimum limit prices
• b) Determine the equation.

6. In the amplifier circuit below, determine!

• a. Voltage Gain
• b. The working point of the amplifier.

Information:

• Mosfet D 3N 128
• Up = ugs OFF = 8 v
• idss = 5 Ma
• gm = 5 ms ( milli siemens )
• rd = Drain Source Resistance = 200 ohms.

7. Resistor R2 as a determinant ....................................................................

8. Among the transistors that require the same hfe (β) are: 

β Transistor ............ = β Transistor ..................
βTransistor ............ = β Transistor ..................

9. The factor that determines the output voltage amplification factor in relation to the input is......

10. Potentiometer P2 functions to ...............................................................

11. C5 functions for ................................................ ................................

12. Give an example of a MOSFET that has a special construction!

13. Explain the use of SIP Mosfet!

14. State the advantages of MOSFET when operated at high power!

Completion

1. N Channel MOSFET Symbol

a. Depletion MOSFET Channel N - b. Depletion MOSFET Channel P - c. Enhancement MOSFET Chanal N - d. MOSFET Enhancement Chanal P

2. Characteristic Image of D Mosfet Channel P

3. Describe the characteristics of the E-channel MOSFET P

4. Why do MOSFETs (Field Effect Transistors) have lower noise than ordinary unipolar transistors?

Because in the composition of the material FET / Mosfet channel FET / Mosfet channels are of one type even semi-conductor N or P without a connection as the path of drain current (ID) to the source. Because without a connection, the electron current through the channel does not cause strong electron vibrations so that noise is almost non-existent (very low).

This is different from unipolar transistors where the collector current (IC) goes to the emitter through a PNP or NPN connection so that electrons passing through the connection will cause electron vibrations that are strong enough so that noise/hisses will arise in the collector current.

5. How to determine the legs:

Specify the letter J in the empty column, marking the leg arrangement group (appendix B)

Pay attention to the Mosfet SOT 103 packaging, the number of legs is 4 pieces. We set the legs:

• Leg no 1 = S (Source)
• Leg no 2 = G1 (Gate 1)
• Leg no 3 = G2 (Gate 2)
• Leg no. 4 = D (Drain)

Limit Price:

• UDS max = 20 V
• ID max = 50 MA
• TJ max = 1500 C
• Max PTOT = 150 MWF
• UGS / VGS = 5 VMX
• IDSS / ID(on) = 3/30 MA
• RDS(on) max = -
• CISS = 4 pO
• CRSS = Op 25
• Similarities (no similarities)

6. Determine the reinforcement and working point

7. Input resistance (Zi)

8. βT1 = βT2; βT3 = βT4

9. R5 and R6

10. As a quiescent current regulator on Drain T12 and T13.

11. high frequency suppressor / prevent oscillation

12. Dual Gate Mosfet (Two gate Mosfet)

13. Large Power Switch

14. Changes in power with respect to temperature are:

• a. If the physical condition is hot, the current will decrease and the temperature will decrease.
• b. The temperature goes down, the power goes up again and so on so it's safe.