OBJECTIVE:
- Students understand the basic principles of PWM
- Students understand the DC Motor Driver circuit
- Students understand assembly programming for PWM control.
Basic Concept of PWM
One of the easiest ways to generate an analog voltage from a digital value is by using pulse-width modulation (PWM). In square wave PWM, a high frequency is generated as a digital output. For example, a bit port continuously switches on and off at a relatively high frequency. Then, when the signal is fed to a low-pass filter LPF, the voltage at the filter output will be equal to the Root Mean Square (RMS) of the square wave signal. The RMS voltage can then be varied by changing the duty cycle of the signal.
DUTY CYCLE indicates the fraction of time the signal is in a logic high state in one cycle. One cycle begins with a low to high transition of the signal and ends with the next transition. During one cycle, if the time the signal is in the high state is the same as the low state then the signal is said to have a DUTY CYCLE of 50%. DUTY CYCLE of 20% indicates that the signal is at logic 1 for 1/5 of the total time.
Gambar 15.1. Duty cycle 30 %
Figure 15.2. PWM application in motor speed setting
PWM with Microcontroller
The circuit shows a DAC built with PWM method, which is used to control the speed of a DC motor with pulse width modulation. Bit 0 of P0 drives a transistor switch as shown in the figure. The motor is turned on and off for a certain period.
The part when the motor is on is called DUTY CYCLE. This program uses a byte to store the length of time the motor is on, from a number of 256 cycles. If the duty cycle given is 10% then this program stores ON time data for 10 cycles and OFF for 246 cycles from 256 cycles.
Next, the duty cycle value is stored in the internal RAM labeled dCycle. The complement of the duty cycle is stored in the internal RAM with the name dCycleC. In this software design, Timer 0 is applied in mode 2, which is 8 bit timer auto reload, which will increment the register counter value every cycle, and if an overflow occurs, the data in TH0 will be loaded to TL0 which functions as an 8 bit counter.
If the crystal frequency used is 12 Mhz, so if the reload value is 0 then timer 0 will overflow every 256 useconds; and if the reload value is FFh then the timer will overflow every 1 usecond. The first time the program turns on the motor and places the dCycle value to TH0 as the reload value. After the timer overflows, the complement of the duty cycle dCycleC will be placed into TH0 as the reload value and the motor stops rotating. In this programming the state of the motor can be seen in the bit-addressable register, which is marked as motorFlag.
Experiment 15.1. Setting the rotation speed of a DC motor with PWM
In this experiment, the rotation speed of the motor is driven using the TIP120 transistor through the PWM method. The PWM is driven using one bit of P0, as shown in the figure below.
Figure 15.3. Flowchart of (a) main routine (b) duty cycle initialization and (c) timer initialization in experiment 15.1.
Figure 15.4. Timer 0 interrupt flow diagram in experiment 15.1.
- Connect the data cable to the input of the DC motor driver circuit.
- Connect the Microcontroller Trainer module to the +5V power supply.
- Connect the Microcontroller Trainer module to the programmer circuit
- Open the M-IDE Studio for MCS-51 program, as a program editor and compiler.
- Type the following program: ( Download File: Prog151a.asm )
dCycle equ 30h
dCycleC equ 31h
PWM bit P0.0
MotorF bit 20h
org 0h
sjmp start
org 0bh
ljmp Interupsi_Timer0
;
start: call Init_Dcycle
call init_Timer
loop: sjmp loop
;
Init_Dcycle:
mov dCycle,#45 ;inisialisasi data dCycle T_ON
mov A,dCycle ;copy data ke A
cpl A ;komplemen A
mov dCycleC,A ;copy A ke dCycleC
ret
;
Init_Timer:
anl TMOD,#0F0h ;
orl TMOD,#2 ;Timer0 mode2 auto reload
mov TH0,dCycle ;Load data counter 8 bit
setb ET0 ;enable interupsi timer0
setb EA ;enable all interupsi
setb TR0 ;timer0 run
ret
;
Interupsi_Timer0:
jb motorF,motorOff ;deteksi bit motorF
setb PWM ;Hidupkan motor
setb P0.7 ;TP pulsa PWM di osiloskop
mov TH0,dCycle ;load data dCycle ke TH0
setb motorF ;beri tanda motorF=1-> motor ON
reti
motorOff:
clr PWM ;matikan motor
clr P0.7 ;TP pulsa PWM di osiloskop
mov TH0,dCycleC ;load data cCycleC ke TH0
clr motorF ;beri tanda motorF=0-> motor OFF
reti
end- Save the program you typed and name it: prog151a.asm
- In the MIDE program, select Build /F9 or to compile the program from *.asm to *.hex.
- Program the microcontroller using the ISP Software Program (See Instructions for Use).
Experiment 15.2. Controlling the rotational speed of a DC motor using the PWM method via ADC
In this experiment, the ADC is used to read the voltage from the 0-5 Volt voltage divider input, then the voltage that has been converted into digital data is used to regulate the PWM on the DC Motor.
- Connect the data cable to the input of the DC motor driver circuit.
- Connect the Microcontroller Trainer module to the +5V power supply.
- Connect the Microcontroller Trainer module to the programmer circuit
- Open the M-IDE Studio for MCS-51 program, as a program editor and compiler.
- Type the following program: ( Download File: Prog151a.asm )
dCycle equ 30h
dCycleC equ 31h
PWM bit P0.0
MotorF bit 20h
org 0h
sjmp start
org 0bh
ljmp Interupsi_Timer0
;
start: call init_Timer
loop: call ADC
mov dCycle,A
cpl A
mov dCycleC,A
sjmp loop
;
ADC: clr P3.3
nop
nop
nop
setb P3.3
eoc: jb P3.2,eoc
clr P3.4
mov A,P1
setb P3.4
ret
;
Init_Timer:
mov dCycle,#40
mov A,dCycle
cpl A
mov dCycleC,A
anl TMOD,#0F0h
orl TMOD,#2
mov TH0,dCycle
setb ET0
setb EA
setb TR0
ret
;
Interupsi_Timer0:
jb motorF,motorOff
setb PWM
setb P0.7
mov TH0,dCycle
setb motorF
reti
motorOff:
clr PWM
clr P0.7
mov TH0,dCycleC
clr motorF
reti
end- Save the program you typed and name it: prog151a.asm
- In the MIDE program, select Build /F9 or to compile the program from *.asm to *.hex.
- Program the microcontroller using the ISP Software Program (See Instructions for Use).
Abstraction
Digital Clock is an application development of a Clock that uses manual performance, namely a system that works with a Needle layout to become a clock that is displayed in digital form.
On a Digital Clock, all displays are in the form of digits and the way it works is regulated by an oscillator and a counter, it no longer uses a mechanical drive that moves the needle, but rather an IC 555 as an oscillator that produces one second of time and an IC 4026 as a counter that will count all binary numbers and make the display in decimal form to seven segments and this seven segment is what will display the numbers in the form of decimal numbers.
Verb' in AT89Cx051
Overall, the AT89Cx051 has 255 kinds of instructions, which are formed by combining 'verbs' and objects. These 'verbs' are discussed as a group as follows:
Data Copy Group
The basic code for this group is MOV, short for MOVE which means to move, although it is more appropriate to say that this command has the meaning of copying data. This can be explained as follows: after the MOV A,R7 instruction is executed, Accumulator A and general-purpose register R7 contain the same data, which was originally stored in R7.
The MOV command is distinguished according to the type of AT89Cx051 memory. This command in data memory is written as MOV, for example:
MOV A,$20
MOV A,@R1
MOV A,P1
MOV P3,AFor use in program memory, this command is written as MOVC, there are only 2 types of instructions that use MOVC, namely:
MOVC A,@A+DPTR ; DPTR sebagai register indirect
MOVC A,@A+PC ; PC sebagai register indirectIn addition, the MOVX command is also known, namely the command used for external data memory (X stands for External). This command is only owned by members of the MCS51 family that have external data memory, for example AT89C51 and so on, and is clearly not known by the AT89Cx051 group that does not have external data memory. There are only 6 types of instructions that use MOVX, these instructions are:
MOVX A,@DPTR
MOVX A,@R0
MOVX A,@R1
MOVX @DPTR,A
MOVX @R0,A
MOVX @R1,AAssembly Language
Physically, the work of a microcontroller can be explained as a cycle of reading instructions stored in memory. The microcontroller determines the address of the program memory to be read, and performs the process of reading data in memory. The data read is interpreted as an instruction. The instruction address is stored by the microcontroller in a register, known as the program counter. This instruction is for example an arithmetic program involving 2 registers. The facilities available in the assembly program are very minimal, unlike in high-level programming languages where everything is ready to use. The writer of the assembly program must determine everything, determine the location of the program he wrote in the program memory, create constant data and constant tables in the program memory, create variables used to work in the data memory and so on.
1. Assembly source program
Assembly source program is a collection of command lines written with a simple text editor program, such as the EDIT.COM program in DOS, or the NOTEPAD program in Windows or MIDE-51. The collection of command lines is usually saved into a file with the extension name *.ASM and so on, depending on the Assembler program that will be used to process the assembly source program.
Each command line is a complete command, meaning a command cannot be broken into more than one line. One command line can consist of 4 parts, the first part is known as a label or often also called a symbol, the second part is known as an operation code, the third part is an operand and the last part is a comment. Between these parts are separated by a space or tabulator.
2. Label section
Labels are used to name a command line, so that it can be easily referred to in writing programs. Labels can be written anything as long as they start with a letter, usually no more than 16 letters long. The following letters may be numbers or periods and underscores. If a command line does not have a label section, then this section may not be written but a space or tabulator as a separator between the label and the next section must still be written.
In a source program there can be many labels, but there must not be any duplicate labels.
Often a command line consists only of a label section, such a line cannot be said to be a real command line, but only gives a name to the line in question.
The label section is often also called the symbol section, this occurs if the label is not used to mark the program section, but is used to mark the data section.
3. Operation code section
Operation code (often abbreviated as OpCode) is a part of the command that must be executed. In this case, two types of operation codes are known, the first is the operation code to regulate the work of the microprocessor / microcontroller. The second type is used to regulate the work of the assembler program, often called the assembler directive.
Operation codes are written in mnemonic form, which is a relatively easy to remember abbreviation, for example MOV, ACALL, RET and so on. These operation codes are determined by the microprocessor/microcontroller manufacturer, thus each processor has a different operation code.
Mnemonic operation codes are not recognized by the microprocessor/microcontroller, so that programs written with mnemonic codes can be used to control the processor, such programs are translated into programs formed from binary operation codes, which are recognized by the microprocessor/microcontroller.
The translation task is carried out by a program called the Assembler Program.
Apart from the operation codes specified by the microprocessor/microcontroller manufacturer, there are also operation codes to regulate the work of the assembler program, for example used to determine the location of the program in memory (ORG), used to form variables (DS), form tables and constant data (DB, DW) and so on.
4. Operand section
Operands are complementary parts of the operation code, but not all operation codes require operands, so a command line can only consist of operation codes without operands. On the other hand, there are also operation codes that require more than one operand, in this case between one operand and another is separated by a comma.
The form of operands varies greatly, it can be codes used to state Registers in the processor, it can be memory numbers (memory addresses) stated with numbers or label names, it can be data ready to be operated on. All are adjusted to the needs of the operation code.
To distinguish between operands in the form of memory numbers or operands in the form of data ready to be operated on, special signs or different writing methods are used.
In addition, the operands can be simple mathematical equations or Boolean equations, in this case the Assembler program will calculate the value of the equations in the operands, then change the results of the calculation to binary code that is understood by the processor. So the calculation in the operands is done by the assembler program not by the processor!
5. Comments section
The comment section is the program author's notes, this section, although not absolutely necessary, is very helpful for documentation issues. Reading the comments on each command line, you can easily understand the purpose of the line in question, this is very helpful for other people who read the program.
The separator of the comment section from the previous section is a space or tabulator, although the first letter of the comment is often a semicolon, which is a special separator for comments.
For intensive documentation purposes, often a line is simply a comment, in which case the first letter of the line is a semicolon.
The AT89S51 has a very complete set of instructions. The MOV instructions for bytes are grouped according to addressing modes. Addressing modes describe how the operands are operated on. Here is an explanation of the various addressing modes. The general form of an assembly program is as follows:
| Label/Simbol | Opcode | Operand | Komentar |
|----------------------------------------------|----------------------------------------------------------------------|---------------------------------------------------------------------------------------------------------|------------------------------------------------------------------------------|
| | Org | 0H | |
| Start: Kiri: Delay: Del1: Del2: | Mov Mov Mov Call RL DEC CJNE Sjmp mov mov djnz djnz ret end | A, #11111110b R0, #7 P0, A Delay A R0 R0, #0, Kiri Start R1, #255 R2, #255 R2, del2 R1, del1 | ; Isi Akumulator ; Isi R0 dengan 7 ; Copy A ke P0 ; Panggil Delay |The memory contents are hexadecimal numbers recognized by our microcontroller, which are a representation of the assembly language we have created. Mnemonic or opcode is the code that will perform an action on the operand. Operand is the data processed by the opcode. An opcode can require 1,2 or more operands, sometimes it doesn't need operands. While comments can be given by using a semicolon ( 
. Here are examples of different numbers of operands in an assembly.
CJNE R5,#22H, aksi ;dibutuhkan 3 buah operand
MOVX @DPTR, A ;dibutuhkan 2 buah operand
RL A ;1 buah operand
NOP ; tidak memerlukan operandThe program that we have finished making can be saved with the extension .asm. Then we can create an object program with the extension HEX using the MIDE-51 compiler, which is explained as follows:
6. Assembly Listing
The assembly source program above, after being written is submitted to the Assembler program to be translated. Each processor has its own assembler program, even one type of processor can have several types of Assembler programs made by different software manufacturers.
The main result of Assembler program processing is an object program. This object program can be a separate file, containing codes that are ready to be sent to the microprocessor/microcontroller program memory, but there are also object programs that are inserted into the assembly source program as seen in the Assembly Listing in Figure 2.
The right side of Figure 2 is the original Assembly source program by the program author. After being translated by the Assembler program, the resulting codes along with the memory numbers where the codes are stored are inserted on the left side of each command line, so that the form of this program is no longer called an assembly source program but is called an Assembly Listing.
Reading Assembly Listings can provide a clearer picture of the program being written. For beginners, Assembly Listings provide a deeper understanding of the contents of program memory, so that you can better imagine how a program works.
Line Addr Code Source
1: Org 0H
2: 0000 74 FE Start: Mov A,#11111110b
3: 0002 78 07 Mov R0,#7
4: 0004 F5 80 Kiri: Mov P0,A
5: 0006 12 00 1C Call Delay
6: 0009 23 RL A
7: 000A 18 DEC R0
8: 000B B8 00 F6 CJNE R0,#0,Kiri
9: 000E 78 07 Mov R0,#7
10: 0010 F5 80 Kanan: Mov P0,A
11: 0012 12 00 1C Call Delay
12: 0015 03 RR A
13: 0016 18 DEC R0
14: 0017 B8 00 F6 CJNE R0,#0,Kanan
15: 001A 80 E4 Sjmp Start
16: ;
17: 001C 79 FF Delay: mov R1,#255
18: 001E 7A FF Del1: mov R2,#255
19: 0020 DA FE Del2: djnz R2,del2
20: 0022 D9 FA djnz R1,del1
21: 0024 22 retInterruption
The 8051 has 5 interrupt sources. Two external interrupts, two timer interrupts and a serial port interrupt.
Although it requires a deeper understanding, knowledge of interrupts is very helpful in overcoming microprocessor/microcontroller programming problems in terms of handling many input/output devices. Knowledge of interrupts is not enough to be discussed only in theory, concrete program examples are needed to understand.
When the RESET leg on the microprocessor/microcontroller IC receives a reset signal (on the MCS51 the signal is a momentary '1' signal, on other processors it is generally a momentary '0' signal), the Program Counter is filled with a value. This value is called the reset vector, which is the initial number of the program memory that contains the program to be executed.
The discussion above illustrates that the reset process is a hardware event (the reset signal is fed to the Reset leg) which is used to regulate the work of the software, namely determining the flow of the processor program (filling the Program Counter with the reset vector). The program that is run by resetting is the main program for the processor.
Hardware events that are used to regulate the operation of software, not only occur in the reset process, but also occur in the interrupt process.
In the interrupt process, the occurrence of something on a particular hardware is recorded in a special flip-flop, the flip-flop is often referred to as a 'flag', the record in the flag is arranged in such a way that it can be an interrupt request signal to the processor. If this interrupt request is served by the processor, the Program Counter will be filled with a value. This value is called an interrupt vector, which is the initial number of the program memory that contains the program used to serve the interrupt request.
A program that is executed by interruption is called an interrupt service routine (ISR). When the processor executes an ISR, the work being done on the main program is temporarily abandoned, after the ISR is completed the processor returns to executing the main program, as illustrated in Figure 1.
Figure 1.8 Processor work diagram serving interrupts
A processor can have several hardware devices that are sources of interrupt request signals, each interrupt source is served with a different ISR, thus the processor has several interrupt vectors to choose which ISR is used to serve interrupt requests from various sources. Sometimes an interrupt vector is used by more than one similar interrupt source, in this case the ISR concerned must determine itself which interrupt source must be served at that time.
If at the same time more than one interrupt request occurs, the processor will serve the interrupt request according to the predetermined priority, after serving the higher priority interrupt request, the processor will serve the next interrupt request, and only then will it return to working on the main program.
While the processor is working on an ISR, another interrupt request may occur, if the interrupt request that came recently has a higher priority, the ISR that is being worked on is left first, the processor serves the higher priority request, after serving the high priority interrupt the processor continues the original ISR, and then returns to working on the main program. This is called a nested interrupt, but not all processors have the ability to serve interrupts in this way.
1. MCS51 interrupt source
As seen in Figure 2, the AT89C51 has 6 interrupt sources, namely External Interrupts originating from the INT0 and INT1 pins, Timer Interrupts originating from Timer 0 and Timer 1, Serial Port Interrupts originating from the receiver and sender sections of the Serial Port.
In addition, the AT89C52 has 2 other interrupt sources, namely the Timer 2 Interrupt which comes from Timer 2 which is not present on the AT89C51.
The IE0 bit (or IE1 bit) in TCON is a flag that indicates an External Interrupt request. There are 2 conditions that can activate this flag, the first is because the voltage level is '0' on the INT0 (or INT1) leg, the second is because the signal transition from '1' to '0' on the INT0 (or INT1) leg. The choice of this signal form is determined via the IT0 bit (or IT1 bit) contained in the TCON register.
If the IT0 (or IT1) bit ='0' then the IE0 (or IE1) bit in TCON becomes '1' when the INT0 leg ='0'.
If the IT0 (or IT1) bit = '1' then the IE0 (or IE1) bit in TCON becomes '1' when a '1' to '0' signal transition occurs on the INT0 leg.
Before the processor executes the ISR of the External Interrupt, the IE0 bit (or IE1 bit) is reset to '0', indicating that the External Interrupt request has been served. However, if the External Interrupt request occurs because the voltage level is '0' on the IT0 (or IT1) leg, and the voltage level on that leg is still ='0' then the IE0 bit (or IE1 bit) will immediately become '1' again!
The TF0 bit (or TF1 bit) in TCON is a flag that indicates a Timer Interrupt request. The TF0 bit (or TF1 bit) becomes '1' when an overflow occurs in the Timer 0 (or Timer 1) binary counter.
Before the processor executes the ISR of the Timer Interrupt, the TF0 bit (or TF1 bit) is set to '0', indicating that the Timer Interrupt request has been serviced.
Serial port interrupts occur due to two things, the first occurs after the serial port has finished sending 1 byte of data, this type of interrupt request is marked with the flag TI='1'. The second occurs when the serial port has received 1 byte of data in full, this type of interrupt request is marked with the flag RI='1'.
The above flags are not reset to '0' before the processor executes the ISR of the Serial Port Interrupt, because the flags are still needed by the ISR to determine whether the interrupt source is from TI or RI. In order for the serial port to be used again after sending or receiving data, the flags must be reset to zero through the program.
The interrupt request flags (IE0, TF0, IE1, TF1, RI and TI) can all be set to zero or one by instructions, the effect is exactly the same as if the change was made by hardware. This means that interrupt requests can be made programmatically, for example an external interrupt request IT0 can be made with the SETB IE0 instruction.
2. Enable Interrupts
All interrupt request sources discussed above can each be activated or deactivated individually via the bits in the IE (Interrupt Enable Register).
The EX0 and EX1 bits are used to set external interrupts INT0 and INT1, the ET0 and ET1 bits are used to set timer 0 and timer 1 interrupts, and the ES bit is used to set serial port interrupts, as shown in Figure 2. In addition, there is also an EA bit that can be used to set all interrupt sources at once.
After reset, all bits in the IE register are set to '0', meaning the interrupt system is disabled. To enable one of the interrupt systems, the corresponding interrupt control bit is enabled and also the EA that controls all interrupt sources. For example, the instruction used to enable the external interrupt INT0 is SETB EX0 followed by SETB EA.
| MSB | | | | | | | LSB |
|-----|---|---|----|-----|-----|-----|-----|
| EA | X | X | ES | ET1 | EX1 | ET0 | EX0 || BIT | SYMBOL | FUNCTION |
|------|--------|--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
| IE.7 | EA | Disables all interrupts. If EA=0, no interrupt will be acknowledged. If EA=1, each interrupt source is individually enabled or disabled by setting or clearing its enable bit. |
| IE.6 | - | - |
| IE.5 | - | - |
| IE.4 | ES | Enables or disables the Serial Port interrupt. If ES=0, the Serial Port interrupt is disabled. |
| IE.3 | ET1 | Enables or disables the Timer 1 Overflow interrupt. If ET1=0, the Timer 1 interrupt is disabled. |
| IE.2 | EX1 | Enables or disables External Interrupt 1. If EX1=0, External interrupt 1 is disabled. |
| IE.1 | ET0 | Enables or disables the Timer 0 Overflow interrupt. If ET0=0, the Timer 0 interrupt is disabled. |
| IE.0 | EX0 | Enables or disables External interrupt 0. If EX0=0, External interrupt 0 is disabled. |3. Interrupt Vector
When the MCS51 responds to an interrupt request, the Program Counter is filled with a value called the interrupt vector, which is the starting number of the program memory that holds the ISR to service the interrupt request. The interrupt vector is used to execute the hardware-enabled LCALL instruction.
The interrupt vector for external interrupt INT0 is $0003, for timer 0 interrupt is $000B, for external interrupt INT1 is $0013, for timer 1 interrupt is $001B and for serial port interrupt is $0023.
The distance between interrupt vectors is 8, or only 8 bytes are available for each ISR. If an ISR is indeed short, no more than 8 bytes, then the ISR can be written directly to the program memory provided for it. ISRs longer than 8 bytes are written elsewhere, but the program memory pointed to by the interrupt vector is filled with a JUMP instruction towards the relevant ISR.
| Source | Vector Address |
|---------|----------------|
| IE0 | 0003H |
| TF0 | 000BH |
| IE1 | 0013H |
| TF1 | 001BH |
| RI + TI | 0023H |4. Priority Levels
Each interrupt source can be placed at two different priority levels. The priority level setting is done with the bits in the IP (Interrupt Priority) register.
The PX0 and PX1 bits are for setting the priority level of external interrupts INT0 and INT1, the PT0 and PT1 bits are for setting the timer 0 and timer 1 interrupts, and the PS bit is for setting the serial port interrupts, as shown in Figure 2.
After reset, all bits in the IP register are set to '0', meaning all interrupt sources are placed at the zero priority level. Each interrupt source can be placed at the high priority level by setting its control bit to 'one'. For example, the timer 0 interrupt can be placed at the high priority level with the SETB PT1 instruction.
An ISR for a non-priority interrupt can be interrupted by an interrupt source that is in the primary priority level. But interrupts that are in the same priority level cannot interrupt each other.
If 2 interrupt requests occur at the same time, while both interrupts are at different priority levels, then the interrupt at the highest priority level will be served first, after which the interrupt at the non-priority level will be served.
If both requests are at the same priority level, the priority will be determined in the following order: external interrupt INT0, timer 0 interrupt, external interrupt INT1, timer 1 interrupt and finally the serial port interrupt.
5. Complete Chart of MCS51 Interrupt System
Although the MCS51 interrupt system is relatively simple compared to the Motorola MC68HC11 interrupt system, because it involves 5 interrupt sources, each of which must be set separately, it is not easy to remember all of these problems, especially when creating a program, it is often felt to be very troublesome to flip through books to set each of these interrupt sources.
Figure 2 illustrates the MCS51 interrupt system in full, along with each bit in the SFR (Special Function Register) registers used to control each interrupt source.
The switches depicted in Figure 2 represent the bits in the register that must be set to control the interrupt source, the small flag boxes are flags in the register that record the interrupt request from each interrupt source. The position of the switches in the figure represents the initial position after the MCS51 is reset.
This image is very helpful when writing programs involving MCS51 interrupts.
Interrupt Priority Register (IP)
| MSB | | | | | | | LSB |
|-----|---|---|----|-----|-----|-----|-----|
| X | X | X | PS | PT1 | PX1 | PT0 | PX0 |Note:
| BIT | SYMBOL | FUNCTION |
|------|--------|-----------------------------------------------------------------------------------------------------------|
| IP.7 | - | - |
| IP.6 | - | - |
| IP.5 | - | - |
| IP.4 | PS | Defines the Serial Port interrupt priority level. PS=1 programs it to the higher priority level. |
| IP.3 | PT1 | Defines the Timer 1 interrupt priority level. PT1=1 programs it to the higher priority level. |
| IP.2 | PX1 | Defines the External Interrupt 1 priority level. PX1=1 programs it to the higher priority level. |
| IP.1 | PT0 | Enables or disables the Timer 0 interrupt priority level. PT0=1 programs it to the higher priority level. |
| IP.0 | PX0 | Defines the External Interrupt 0 priority level. PX0=1 programs it to the higher priority level. |